In today's memory realizations, information is stored in an additional element on the circuit board of the memory module via a memory module or memory chip of the memory module, respectively, this additional element having the form of an EEPROM and being known under this term for the above-mentioned purpose in the context of memory architectures. The information stored in the EEPROM, on the one hand, relates to chip parameters, such as, for example, the number of X and Y addresses, timing parameters and the size of the module, and, on the other hand, to manufacturer-specific data, such as, for example, name of the company, production site, test program version and date of manufacture. In the first test of the memory module, this data is stored into the EEPROM and, after that, will never be changed.
This fundamental well-known architecture is schematically shown in FIG. 2. In FIG. 2, a memory environment 10 is shown, which can, for example, be a computer. In addition, the reference numeral 12 designates a memory module on which a memory chip 14 is arranged. An information EEPROM is also arranged on the board of the memory module 12, as has been described above, the EEPROM storing information relating to the module 12 or the chip 14, respectively. In addition, a chip set 18 which can, for example, be formed by chips on the motherboard is shown in FIG. 2, the chips enabling communication between the memory module 12 or the memory chip 14, respectively, and a processor. The chip set 18 is also designed to send read commands via an associated command line 20 to the EEPROM 16 and, responsive thereto, to receive data via a corresponding data line 22 from the EEPROM.
According to data received by the EEPROM, the chip set 18 then controls communication with the memory module 12 or the memory chip arranged thereon, respectively, a plurality of memory chips usually being arranged on a memory module. It is obvious for those skilled in the art what the respective communication between the chip set and the memory module or the memory chip, respectively, is like, no further explanation being required for this.
It is a disadvantage of the solution shown in FIG. 2 that the additional element on the board of the memory module 12, that is the EEPROM 16, on the one hand requires space and on the other hand causes additional costs of purchasing and mounting same. In addition, the EEPROM is susceptible to errors so that reliability problems may arise.